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lamaPLC Communication: UART basic
A universal asynchronous receiver-transmitter (UART) is a peripheral device for asynchronous serial communication in which the data format and transmission speeds are configurable. It sends data bits one by one, from the least significant to the most significant, framed by start and stop bits so that precise timing is handled by the communication channel. The electric signaling levels are handled by a driver circuit external to the UART. Common signal levels are RS-232, RS-422, RS-485, GPS-moduls and raw TTL for short debugging links. Early teletypewriters used current loops.
The universal asynchronous receiver-transmitter (UART) takes bytes of data and transmits the individual bits in a sequential fashion. At the destination, a second UART re-assembles the bits into complete bytes. Each UART contains a shift register, which is the fundamental method of conversion between serial and parallel forms. Serial transmission of digital information (bits) through a single wire or other medium is less costly than parallel transmission through multiple wires.
The UART usually does not directly generate or receive the external signals used between different items of equipment. Separate interface devices are used to convert the logic level signals of the UART to and from the external signaling levels, which may be standardized voltage levels, current levels, or other signals.
Communication may be 3 modes:
- simplex (in one direction only, with no provision for the receiving device to send information back to the transmitting device)
- full duplex (both devices send and receive at the same time)
- half duplex (devices take turns transmitting and receiving)
For UART to work the following settings need to be the same on both the transmitting and receiving side:
- Voltage level
- Baud Rate
- Parity bit
- Data bits size
- Stop bits size
- Flow Control
For the voltage level, 2 UART modules work well when they both have the same voltage level, e.g 3V-3V between the 2 UART modules. To use 2 UART modules at different voltage levels, a level switch circuit needs to be added externally
Data framing
A UART frame consists of 5 elements:
- Idle (logic high (1))
- Start bit (logic low (0))
- Data bits
- Parity bit
- Stop (logic high (1))
UART frame, field length in Bits | |||
---|---|---|---|
1 | 5-9 | 0-1 | 1-2 |
Start Bit | Data Frame | Parity Bits | Stop Bits |
In the most common settings of 8 data bits, no parity and 1 stop bit (aka 8N1), the protocol efficiency is 80%. For comparison, Ethernet's protocol efficiency when using maximum throughput frames with payload of 1500 bytes is up to 95% and up to 99% with 9000 byte jumbo frames. However due to Ethernet's protocol overhead and minimum payload size of 42 bytes, if small messages of one or a few bytes are to be sent, Ethernet's protocol efficiency drops much lower than the UART's 8N1 constant efficiency of 80%.
The idle, no data state is high-voltage, or powered. This is a historic legacy from telegraphy, in which the line is held high to show that the line and transmitter are not damaged.
Each character is framed as a logic low start bit, data bits, possibly a parity bit and one or more stop bits. In most applications the least significant data bit (the one on the left in this diagram) is transmitted first, but there are exceptions (such as the IBM 2741 printing terminal).
Start bit
The start bit signals to the receiver that a new character is coming.
Data bit
The next five to nine bits, depending on the code set employed, represent the character.
Parity bit
If a parity bit is used, it would be placed after all of the data bits.
The parity bit is a way for the receiving UART to tell if any data has changed during transmission.
Stop bit
The next one or two bits are always in the mark (logic high, i.e., '1') condition and called the stop bit(s). They signal to the receiver that the character is complete. Since the start bit is logic low (0) and the stop bit is logic high (1) there are always at least two guaranteed signal changes between characters.