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| sensor:external_fram [2026/07/28 22:33] – created vamsan | sensor:external_fram [2026/07/28 22:55] (current) – [I²C topics on lamaPLC] vamsan | ||
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| ====== LamaPLC: External FRAM memory module ====== | ====== LamaPLC: External FRAM memory module ====== | ||
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| **FRAM** (// | **FRAM** (// | ||
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| ==== MB85RC256 Non-Volatile FRAM Board with I²C communication ==== | ==== MB85RC256 Non-Volatile FRAM Board with I²C communication ==== | ||
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| + | The MB85RC256 Non-Volatile FRAM Board is a high-performance memory breakout module built around Fujitsu' | ||
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| + | === MB85RC256 Technical Specifications === | ||
| + | * **Memory Capacity:** 256 Kilobits (Kb), which translates to exactly 32 Kbytes (KB). | ||
| + | * **Memory Organization: | ||
| + | * **Operating Voltage:** 2.7V to 5.5V (fully compatible with 3.3V and 5V microcontrollers like Arduino, STM32, and ESP32). | ||
| + | * **Communication Interface: | ||
| + | * **Max Clock Speed:** Up to 1.0 MHz.Read/ | ||
| + | * **Data Retention: | ||
| + | * **Power Consumption: | ||
| + | |||
| + | === MB85RC256 Core Functional Mechanics === | ||
| + | |||
| + | **No Write Delay (Instantaneous Commit)** | ||
| + | |||
| + | Traditional EEPROM or Flash memory requires an internal " | ||
| + | |||
| + | **I²C Addressing Flexibility** | ||
| + | |||
| + | The device features a base binary slave address of 1010 (or 0x50). By hardwiring the address pins (A0, A1, A2) to either VCC or GND, you alter the final 3 bits of the address structure: | ||
| + | |||
| + | * All pins to GND: **I²C Address is 0x50 (Default).** | ||
| + | * All pins to VCC: I²C Address shifts to 0x57. | ||
| + | |||
| + | === MB85RC256 Pinout === | ||
| + | ^ Pin Name ^ Function Type ^ Pin Description ^ | ||
| + | | **VCC / VDD** | Power Input | Input power line. Connect to 3.3V or 5V depending on system logic. | | ||
| + | | **GND / VSS** | Power Ground | Common system ground for power and logic return. | | ||
| + | | **SDA** | I²C Logic Data | Serial Data line for bidirectional communication. Requires a pull-up resistor. | | ||
| + | | **SCL** | I²C Logic Clock | Serial Clock line driven by the I²C master device. | | ||
| + | | **WP** | Digital Input | **Write Protect** pin. Connect to VCC to lock memory against writes. Pulled down internally (write-enabled by default). | | ||
| + | | **A0** | Hardware Address | Sets bit 0 of the I²C slave address suffix. Connect to VCC or GND. | | ||
| + | | **A1** | Hardware Address | Sets bit 1 of the I²C slave address suffix. Connect to VCC or GND. | | ||
| + | | **A2** | Hardware Address | Sets bit 2 of the I²C slave address suffix. Connect to VCC or GND. | | ||
| ===== I²C topics on lamaPLC ===== | ===== I²C topics on lamaPLC ===== | ||
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| This page has been accessed for: Today: {{counter|today}}, | This page has been accessed for: Today: {{counter|today}}, | ||